The need for low power consumption in computing devices has increased with the increase in consumer demand for computing devices that are smaller in size yet have larger processing capabilities. The need for low power consumption is especially prevalent in wireless computing devices, such as cellular telephones and personal digital assistants (PDAs) that include applications such as video, MP3 playback, Internet access, and camera functionality. Reductions in power consumption extend battery life, enabling the use of smaller batteries to reduce the size, weight and cost of wireless computing devices.
Power consumption in a processor includes both static power consumption and dynamic power consumption. Static power consumption is power that is consumed by a processor due to leakage current and the resistivity of the silicon technology. Dynamic power consumption, sometimes referred to as switching loss, occurs when processing circuitry and signals are transitioning between logic states. The magnitude of dynamic power dissipation correlates with the system voltage, clock frequency and switching activity. The amount of dynamic power dissipation (P) for a processor can be approximated by the equation P=C*F*V2, where C is the dynamic capacitance, F is the switching frequency, which is dependent on the clock frequency, and V is the supply voltage.
One existing approach to reducing power consumption in a computing devices requires applications to inform the operating system of their frequency requirements. In this case, each applications must be aware of its exact performance requirements as well as the clock speeds available on the associated processor. Consequently, application developers are required to have intimate knowledge of the processor usage pattern for each of the applications. However, this approach does not account for the combined processor demands of multiple applications running simultaneously.